| Range | Contains | 
|---|---|
| 0x2000 - 0x20FF | Buffers addressed in linear space. Others addressed by bank | 
| 0x2100 - 0x21FF | Engine slots 0-15 | 
| 0x2200 - 0x22FF | Engine slots 16-31 | 
| 0x2300 - 0x23EF | Engine slots 32-44 | 
| Location | bank 0 2000-204F  | bank 1 2050-209F  | bank 2 20A0-20EF  | bank 3 20F0-213F  | Bank 12 23C0-23EF  | 
|---|---|---|---|---|---|
| 18455 | PORT TRIS LAT | ADC | ADC UART1 | MSSP | CWG1 CWG2 | 
| 20 | Messages from EUSART1 to EUSART2  | 
	DCC_STATE | Messages from EUSART2 to EUSART1  | 
	For ESP-01 WiFi total 64 bytes  | 
	Same order as DCC1  | 
| 21 | DCC_SUBST | ||||
| 22 | DCC_ADDR | ||||
| 23 | |||||
| 24 | DCC_MSG command and up to 2 data  | ||||
| 25 | |||||
| 26 | |||||
| 27 | DCC_AREG | ||||
| 28 | DCC_CKSM | ||||
| 29 | DCC_pr previous timer value  | ||||
| 2A | |||||
| 2B | DCC_inot buffer indices | ||||
| 2C | circular buffer of pulse width measurements  | ||||
| 2D | |||||
| 2E | |||||
| 2F | |||||
| 30 | EUSART1 send only D0,D1 6 B2 4  | 
	page 21 Engine slots  | 
	|||
| 31 | |||||
| 32 | |||||
| 33 | |||||
| 34 | |||||
| 35 | |||||
| 36 | |||||
| 37 | |||||
| 38 | SO_INp0 send from SIO_buf | EO_INp0 send from ERX_buf | |||
| 39 | SO_INp1 send from E2L_buf | EO_INp1 send from L2E_buf | |||
| 3A | SO_INp2 send from SO_buf | EO_INp2 send from ETX_buf | |||
| 3B | SO_ot | EO_ot | |||
| 3C | SO_lim | EO_lim | |||
| 3D | SI_in | EI_in | |||
| 3E | SI_cksm | EI_cksm | |||
| 3F | SI_size | EI_size | |||
| 40 | EUSART1 receive and reply  | 
	EUSART2 receive and reply  | |||
| 41 | |||||
| 42 | |||||
| 43 | |||||
| 44 | |||||
| 45 | |||||
| 46 | |||||
| 47 | |||||
| 48 | DGpw0H | ||||
| 49 | |||||
| 4A | DGpw0L | ||||
| 4B | |||||
| 4C | DGpw1 | ||||
| 4D | |||||
| 4E |   | ||||
| 4F |   | ||||
| 50 | EUSART2 send only  | 
	||||
| 51 | |||||
| 52 | |||||
| 53 | |||||
| 54 | |||||
| 55 | |||||
| 56 | |||||
| 57 | |||||
| 58 | FM_FAL FRAM address lsb | For ESP-01 WiFi total 64 bytes  | |||
| 59 | FM_FAH FRAM address msb | ||||
| 5A | FM_RAL RAM address lsb | ||||
| 5B | FM_RAH RAM address msb | ||||
| 5C | FM_BC byte count | ||||
| 5D |   | ||||
| 5E |   | ||||
| 5F | ser_cfg Available interfaces | ||||
| 60 | DCC generator outgoing message  | ||||
| 61 | |||||
| 62 | |||||
| 63 | |||||
| 64 | |||||
| 65 | |||||
| 66 | |||||
| 67 | |||||
| 68 |   | ||||
| 69 |   | ||||
| 6A |   | ||||
| 6B |   | ||||
| 6C |   | ||||
| 6D |   | ||||
| 6E |   | ||||
| 6F |   | ||||
| Usage | by domain | aliased | |||
| 70 | IH_t1 | ||||
| 71 | IH_t2 | ||||
| 72 | SV_t1 | ||||
| 73 | SV_t2 | ||||
| 74 | SV_t3 | FM_retry | |||
| 75 | SV_t4 | FM_bit | |||
| 76 | BG_t1 | ||||
| 77 | FM_t1 | ||||
| 78 | FM_shift | ||||
| 79 | m_stat | ||||
| 7A | res | ||||
| 7B | DG_in | ||||
| 7C | DG_ot | ||||
| 7D | DG_state | ||||
| 7E | DG_reg | ||||
| 7F | EP_ctl | ||||