| Range | Contains |
|---|---|
| 0x2000 - 0x20FF | Buffers addressed in linear space. Others addressed as banks 0 - 3. See below |
| 0x2100 - 0x21FF | Unassigned |
| 0x2200 - 0x22FF | Unassigned |
| 0x2300 - 0x23EF | ENG_TAB - engine data |
| Location | bank 0 2000-204F | bank 1 2050-209F | bank 2 20A0-20EF | bank 3 20F0-213F |
|---|---|---|---|---|
| 18325 184xx 188xx |
PIR TMr0/1/2 PORT TRIS LAT PORT TRIS LAT TMR0 |
PIE ADR ADC ADC |
CMP DAC ADC UART1 ADC UART |
UART MSSP MSSP |
| 20 | receive and send |
status of each driver |
Group network send and receive |
|
| 21 | ||||
| 22 | ||||
| 23 | ||||
| 24 | ||||
| 25 | ||||
| 26 | ||||
| 27 | ||||
| 28 | APM last reported | |||
| 29 | ||||
| 2A | ||||
| 2B | ||||
| 2C | ||||
| 2D | ||||
| 2E | ||||
| 2F | ||||
| 30 | DCC_STATE | circular buffer |
GIO_tin transmit in | page 21 |
| 31 | DCC_SUBST | GIO_tot transmit out | ||
| 32 | DCC_AREG | GIO_rin receive in | ||
| 33 | DCC_ADDR | GIO_cksm receive checksum | ||
| 34 | ||||
| 35 | DCC_MSG | |||
| 36 | ||||
| 37 | ||||
| 38 | ||||
| 39 | DCC_CKSM | |||
| 3A | XP_IN | |||
| 3B | XP_OT | |||
| 3C | XP_RP | |||
| 3D | OC_SAMP | |||
| 3E | OC_CNT0 | |||
| 3F | OC_CNT1 | |||
| 40 | send only D0,D1 6 B2 4 | |||
| 41 | ||||
| 42 | ||||
| 43 | ||||
| 44 | ||||
| 45 | ||||
| 46 | ||||
| 47 | ||||
| 48 | ||||
| 49 | ||||
| 4A | ||||
| 4B | ||||
| 4C | ||||
| 4D | ||||
| 4E | ||||
| 4F | ||||
| 50 | SO_INp0 send from SIO_buf | readback replies E7 14 | ||
| 51 | SO_INp2 send from SO_buf | |||
| 52 | SO_INp1 send from SX_buf | |||
| 53 | SO_ot | |||
| 54 | SO_lim | |||
| 55 | SI_IN | |||
| 56 | SI_CKSM | |||
| 57 | OMR0 OPS | |||
| 58 | OMR1 Mode | |||
| 59 | OMR2 Readback | |||
| 5A | OC_retry | |||
| 5B | timer0h used by 8-bit tmr0 cores | |||
| 5C | BOD_mat sensed in state 0 | |||
| 5D | BOD_int sensed during interrupt | |||
| 5E | BOD_scn sensed during address | |||
| 5F | BOD_stat matrix/scan result | |||
| 60 | BOD_rep reported state | debounce counters | ||
| 61 | FM_FAL FRAM address lsb | |||
| 62 | FM_FAH FRAM address msb | |||
| 63 | FM_RAL RAM address lsb | |||
| 64 | FM_RAH RAM address msb | |||
| 65 | FM_BC byte count | |||
| 66 | ||||
| 67 | ||||
| 68 | ||||
| 69 | ||||
| 6A | ||||
| 6B | ||||
| 6C | ||||
| 6D | ||||
| 6E | ||||
| 6F | ||||
| Usage | by domain | aliased | ||
| 70 | IH_t1 | |||
| 71 | IH_t2 | |||
| 72 | IH_t3 | |||
| 73 | BG_t1 | |||
| 74 | BG_t2 | SV_t1 / LED_p1 | ||
| 75 | BG_t3 | SV_t2 / LED_p2 | ||
| 76 | BG_t4 | LED_p3 | ||
| 77 | BG_t5 | LED_p4 | ||
| 78 | BG_t6 | SV_t3 / FM_retry | ||
| 79 | BG_t7 | SV_t4 / FM_bit | ||
| 7A | FM_t1 | |||
| 7B | FM_shift | |||
| 7C | EP_ctl - event processing control | |||
| 7D | M_STAT | |||
| 7E | BOD_ctr BOD sequence control | |||
| 7F | SYS_RES System resources present | |||